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IMAPS France vous présente ses meilleurs voeux pour 2018

Down load technical programme


From Nano to Micro Power Electronics

And Packaging Workshop

October the 11th and 12th, 2017

Tours, France



Technical Committee: Stéphane BELLENGER, éolane, France – General Chairman

Daniel ALQUIER, Greman Laboratory, France - Chairman

Christophe SERRE, ST Microelectronics, France - Chairman

Nicolas VIVET, ST Microelectronics, France – SAM3 Programme coordinator

Lars BOETTCHER, Fraunhofer Institute IZM, Germany

Cyril BUTTAY, Ampère Laboratory, France

Jean-Luc DIOT, Minapack, France

Guo-Quan LU, Virginia Tech, USA

Jürgen SCHUDERER, ABB Corporate Research, Switzerland

Sébastien JACQUES, Greman Laboratory, France





8h30 Workshop package and badge distribution

9h30 Welcome: workshop programme presentation

10h00 SAM3 conference introduction:

“Growing importance of assembly and packaging” K. Pressel, Infineon.


11h00 Coffee break / Table Top Exhibition

11h30 Failure Analysis Session

11h30 “CIVA, a promising simulation software for acoustic microscopy applications”, P. Serre, Predictive Image.


12h00 Table Top Exhibition visit

12h30 Lunch (Buffet)


13h30 Failure Analysis Session

13h30 ”Defect localization in 3D System-in-Packages based on Lock-in-Thermography and GHz- Scanning Acoustic Microscopy”, F. Altmann, FWMH-CAM.

14h00 ”Complex Package Failure Analysis Flow Enablers and Accelerators”, A. Reverdy, Sector Technology.

14h30 ”Combined preparation flow of high precision laser tool with Plasma-FIB for SiP failure”, F. Felux, Infineon.


15h00 Coffee break / Table Top Exhibition


15h15 Failure Analysis Session

15h15 ”Latest development for failure analysis – When ions meet chemistry”, G. Goupil, Tescan, Orsay-Physics


16h00 End of session


9h00 Workshop package and badge distribution


9h30 Welcome: Second day workshop programme presentation

9h45 Keynotes:

Additive Manufacturing of Power Electronics Magnetics”, Guo-Quan Lu, VirginiaTech USA


10h30 Coffee break / Table Top Exhibition


11h00 Session Materials, Processes & Technologies

11h00 “Investigation on Cu-Sn inter-diffusion for power semi-conductor packaging”, Yousra Bettahi, ST Microelectronics Tours, France

11h25 “Hybrid silver sintering die-attach paste for multi-die packaging of mid-power solutions”, Alexandre Val, ASE Europe, Bruxelles, Belgium

11h50 “Reliability analysis of Cu-Sn intermetallic joints elaborated at low temperature by transient Liquid Phase Bonding Process”, Jean-Luc Diot, Composite Innovation, Pessac, France


12h15 Table Top Exhibition visit

13h00 Lunch (Buffet)


14h00 Keynotes:

“Panel Level Packaging for Power Applications”, Rolf Aschenbrenner, IZM Fraunhofer Institute, Berlin, Germany


14h45 Coffee break / Table Top Exhibition


15h15 Session Materials, Processes & Technologies

15h15 “Fine Pitch Solder Bumping by Printing through Dry Film Photo Resist”, Gabriel Parès, CEA-Leti, Grenoble, France

15h40 “Bipolar Step-up Converter with MPPT for Thermal Energy Harvesting Systems”, Loreto Mateu, Fraunhofer Institute, Nurembung, Germany

16h05 “Shielding’s effect of radiating components”, Zana Kari, Greman institute, Tours, France


16h30 End of session