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  MiNapad 2018


Tuesday May 15th

Afternoon: 15.30 to 17.30 – Lecture Karlheinz Bock (Institute for Electronic Packaging, TU Dresden Makalu Room) -Hetero-integration-Electronics packaging for multi-functional systems


Co-organized with IEEE-CPMT


Wednesday May 16th

8h45      Welcome to MiNaPAD 2018

9h00      Opening by Jean-Luc Diot (Auditorium)

9h30 Keynote 1: Karlheinz Bock (T.U. Dresden): Electro-optical Hetero-integration (Auditorium)

10h15    Exhibition Opening (Exhibition Hall)


Session A: Wafer Level Molding

Session B: Joining


Ultra-Low Warpage Epoxy Mold Compounds for Fan-Out Wafer Level Package Applications

(F. Duval, IMEC)

Mechanical Behavior of Intermetallic in Cu-Sn Inter-Diffusion for Power Semi-Conductor Packaging

(Y. Bettahi, ST Microelectronics, Tours)


Ultra-Low Warpage Liquid Encapsulation Technology for Advanced Wafer Level Packaging (WLP)(R. Zhang, HENKEL Electronic Materials)

A low Temperature Curing Hybrid Silver Sintering Die Attach Paste for High Reliability Power Semiconductor Applications(S. Kanagavel, ALPHA Advanced Materials)


5S-6S Wafer Level Encapsulation: Its Challenges and Solutions(E. Kuah, ASM Technology)

Innovative Adhesives for MEMS Packaging(R. Kmeth, DELO Industrial Adhesives)


Lunch (Exhibition Hall– Exhibition)


Keynote 2: Erik Jung (IZM FRAUNHOFER): Advancement for Exponential Medicine driven by KET: Micro and Nanotechnology (Auditorium)



Session C: Embedded Components

Session D: Fan In/Fan Out


New Embedded Inductors for Power Converter Applications(G. Weidinger, AT&S)

High End Performance Application Key Driver forAdvancedPackaging(E.Jolivet, YOLE Développement)


High Q 3D Inductors Embedded in a Silicon Interposer RF Platform(G. Pares, CEA-LETI)

Fan-in WLCSP Evolution, is Fan out Wafer Level an Extension of Fan-In or a New Platform?(C. Zinck, ASE)

15h05-15h35 Exhibition/Coffee Break sponsored by





Session E: Flip-Chip Process & Applications




Session F:Molded Packages


New-Flip Chip Technology (R. Weindemuth, Panasonic)

nCapsulate, Added Value for (Sensor) System Assembly (I.Van Dommelen, SENCIO)



Direct Bonding with a New Flip-Chip Bonder for Product Environment (P. Metzger, SET CORPORATION)

Development of Cavity Power Packages Based on Liquid Crystal Polymer Thermoplastics (J.L. Diot, NOVAPACK Technologies)


Thermal Interface Materials Assembly and Reliability Challenge(A.Taluy, ST Microelectronics, Grenoble)

New Generation of Routable QFN for Power Sip (J. Abela, UTAC)



Session G: Wafer Level Packaging

Session H: Other Process


Studies of the Electromigration Effect in RDL of Wafer-Level Fan-In and Fan-Out Packaging Using a Novel Analysis Approach(A. Cardoso, AMKOR Portugal)

A Brief Review of Die Bonding Technics(G. Ribette, MICROTEST)


Electrografted Seed Layer Deposition: An Advanced Metallization for Enhanced 12: 1 Aspect Ratio Mid-Process TSV(C. Aumont, ST Microelectronics Crolles)

Surface Preparation Using a Downstream Atmospheric Plasma, Application to Device Packaging        (G. Lecarpentier (SETNA)


17h40 -18h00     Exhibition                                                       

19h30 Social Event   Restaurant « L’Epicurien »

Thursday May 17th

8h30      Keynote 3: Magali Vigier (AIRBUS) & Philippe Pons (AEROSPACE VALLEY Cluster):

Advanced Electronics Boards in Avionics, PCB & Assembly, Challenges and Perspectives (Auditorium)


Session I: BGA Reliability

Session J: Dicing/ Picking


A New Experimental Methodology for Thermal Expansion Calculation and Its Applications for Package Warpage Prediction(M. Rovitto, ST Microelectronics, Italy)

Solutions for Thin and Tiny Dies with High Die Strength and for Thinning WL-CSP and e-WLB Wafers(G. Klug, DISCO HI-TEC Europe GmbH)


Innovative Experimental Setup for Creep Fatigue Interaction in Solder Joints Analysis(S. Zanella, THALES Global Service)

Key Properties for Successful Ultra-Thin Die Pick-up(S. Behler, BESI Switzerland AG)


Lead-free Solder Joints Robustness Improvement Using Bismuth Doping -Application to BGA(L. Petit, ST Microelectronics Grenoble)


Laser Based Full Cut Dicing Evaluations for Thin Si Wafers(J. van Borkulo, ASMPT)

10h45-11h15 Exhibition/coffee break sponsored by


Session K: Hi-Rel Packaging

Session L: Advanced Process


Multiphysics Design of Compact Photonic Devices(A. Annoni, CORDON Electronics)


20 µm Pitch Microbumps Assessment in Chip to Wafer Assembly Configuration(A.Garnier, CEA-LETI)


J.Lead Ceramic Packages for High Performance MEMS Accelerometers: Simulation and Experimental Results(F-X Boillot, TRONIC’S Microsystems)

Curved Sensors for Compact High-Resolution Wide Field Designs: Prototype Demonstration and Optical Characterization (S.Caplet, B. Chambion CEA-LETI)


Packaging Technologies for Harsh Environment Based on Silicon Carbide Substrates (G. Spinola Durante, CSEM)

Functional Glass Encapsulation for Micro-systems)(M. Kuenzi, GLENCATEC)

12h30– 13h30    Lunch & Exhibition (Exhibition hall)

Session M: MEMS & SiP


Titanium based MEMS: application for a novel implantable feedthrough using TTV (Through Titanium Vias) technologies(B. Boutaud, MISTIC)



MEMS and Sensor Packaging Evolution(C. Zinck, ASE)



High Volume System-in-Package Manufacturing Using Traditional SMT Single in-line Solution(W. Kwok, ASM Technology)





14h45-15h15 Exhibition/coffee break

15h15   Keynote 4: Stéphane Bernabé (CEA-LETI):

Key Challenges for Photonic Integrated Circuits Integration and Packaging (Auditorium)

16h15    Best Paper Award

16h30    End of MINAPAD 2018